伊人啪啪-伊人欧美在线-伊人欧美-伊人免费在线观看-97超在线视频-97超视频在线观看

Your Position: Home > News > Company News

In May 8, 2012, promote the use of TSV ( TSV ) 3D laminated to a

2012/8/16??????view:

  In May 8, 2012, promote the use of TSV ( TSV ) 3D laminated to a new generation of DRAM " Hybrid Memory Cube ( HMC ) Hybrid Memory Cube Consortium " popularity ( HMCC ) announced that the United States, software giant Microsoft has joined the association.

  HMC is the three-dimensional structure, the logic chip along the vertical direction superposition of multiple DRAM chips, and then through the TSV connection wiring technology. HMC 's biggest characteristic is compared with existing DRAM, performance can be greatly improved. The reasons there are two, one is between chips from semiconductor package wiring distance on a board on the traditional methods of " cm " units are substantially reduced to dozens ofμ m~ 1mm; two is on a chip to form 1000 to tens of thousands of TSV, realize the multipoint connection chip.

  Microsoft 's accession to the HMCC, because we are considering how to corresponding is likely to become a personal computer and a computer to improving the performance of " memory bottleneck " problem. Memory bottleneck refers to as the microprocessor performance through multiple nucleation and constantly improve, the architecture of the DRAM performance will not be able to meet the need of processor. If do not solve this problem, can occur even if the computer new product, the actual performance is also not appropriate promotion situation. Compared with it, if the TSV based on the application of HMC in computer main memory, the data transmission speed can be increased to the current DRAM is about 15 times, therefore, is not just a giant Microsoft, American companies such as Intel are also active in research using HMC.

  In fact, plans to use TSV not only for HMC and other DRAM products. According to the semiconductor manufacturers plan, in the next few years, borne from electronic equipment input function of the CMOS sensor to the responsible for the operations of FPGA and multi core processor, and in charge of product storage of DRAM and NAND flash will have to import TSV. If the plan goes ahead, TSV will assume the input, operation, storage and other electronic equipment main function.

  In May 8, 2012, promote the use of TSV ( TSV ) 3D laminated to a new generation of DRAM " Hybrid Memory Cube ( HMC ) Hybrid Memory Cube Consortium " popularity ( HMCC ) announced that the United States, software giant Microsoft has joined the association.

  HMC is the three-dimensional structure, the logic chip along the vertical direction superposition of multiple DRAM chips, and then through the TSV connection wiring technology. HMC 's biggest characteristic is compared with existing DRAM, performance can be greatly improved. The reasons there are two, one is between chips from semiconductor package wiring distance on a board on the traditional methods of " cm " units are substantially reduced to dozens ofμ m~ 1mm; two is on a chip to form 1000 to tens of thousands of TSV, realize the multipoint connection chip.

  Microsoft 's accession to the HMCC, because we are considering how to corresponding is likely to become a personal computer and a computer to improving the performance of " memory bottleneck " problem. Memory bottleneck refers to as the microprocessor performance through multiple nucleation and constantly improve, the architecture of the DRAM performance will not be able to meet the need of processor. If do not solve this problem, can occur even if the computer new product, the actual performance is also not appropriate promotion situation. Compared with it, if the TSV based on the application of HMC in computer main memory, the data transmission speed can be increased to the current DRAM is about 15 times, therefore, is not just a giant Microsoft, American companies such as Intel are also active in research using HMC.

  In fact, plans to use TSV not only for HMC and other DRAM products. According to the semiconductor manufacturers plan, in the next few years, borne from electronic equipment input function of the CMOS sensor to the responsible for the operations of FPGA and multi core processor, and in charge of product storage of DRAM and NAND flash will have to import TSV. If the plan goes ahead, TSV will assume the input, operation, storage and other electronic equipment main function.

主站蜘蛛池模板: 欧美日韩伦理| 岛国一区二区| 成人区精品一区二区毛片不卡| 国产在线高清不卡免费播放| 91大神在线精品视频一区| 在线亚洲电影| 亚洲国产精品久久久久| 日韩黄| 亚洲国产精品日韩在线| 亚洲全黄| 亚欧色| 欧美日韩精品在线| 精品一区 二区三区免费毛片| 欧美日韩国产精品va| 欧美成人免费高清视频| 成人特黄午夜性a一级毛片| 精品久久成人| 一97日本道伊人久久综合影院| 欧美日韩高清| 日韩成人精品在线| 国产网站视频| 日本韩国一区二区| 日韩视频免费| 亚洲欧美h| 欧美激情首页| 青青热久久国产久精品| 欧美日韩网| 一区二区视频| 免费的一级毛片| 麻豆91精品91久久久| 欧美一区二区三区视视频| 国产日韩视频一区| 欧美日韩亚洲视频| 在线观看视频国产| 久久香蕉热| 亚洲女同一区二区| 欧美国产在线视频| 欧美日韩国产在线人| 欧美国产在线视频| 欧美精品一区二区三区在线| 欧美久久久久久久一区二区三区 |